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MC54/74F181 4-BIT ARITHMETIC LOGIC UNIT
The MC54/74F181 is a 4-bit Arithmetic Logic Unit (ALU) which can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations. It is 40% faster than the Schottky ALU and only consumes 30% as much power.
* Provides 16 Arithmetic Operations, ie, Add, Subtract, Compare,
Double, Plus Twelve Other Arithmetic Operations * Provides all 16 Logic Operations of Two Variables, ie, Exclusive-OR, Compare, AND, NAND, OR, NOR, Plus Ten Other Logic Operations * Full Lookahead for High-Speed Arithmetic Operation on Long Words
4-BIT ARITHMETIC LOGIC UNIT
FASTTM SCHOTTKY TTL
CONNECTION DIAGRAM
VCC A1 24 23 B1 22 A2 21 B2 20 A3 19 B3 18 G Cn+4 17 16 P 15 A = B F3 14 13
24 1
N SUFFIX PLASTIC CASE 724-03
ORDERING INFORMATION
1 B0 2 A0 3 S3 4 S2 5 S1 6 S0 7 Cn 8 M 9 F0 10 F1 11 12 F2 GND MC54/74FXXXN Plastic
GUARANTEED OPERATING RANGES
Symbol VCC TA IOH VOH IOL Supply Voltage Operating Ambient Temperature Range 74 Output Current -- High Output Voltage -- High A = B output Output Current -- Low 54, 74 54, 74 54, 74 0 25 70 -1.0 5.5 20 Parameter 54, 74 54 Min 4.5 - 55 Typ 5.0 25 Max 5.5 125 Unit V C mA V mA
FAST AND LS TTL DATA 4-92
MC54/74F181
LOGIC SYMBOLS ACTIVE-HIGH OPERANDS
2 1 23 22 21 20 19 18 A0 B0 A1 B1 A2 B2 A3 B3 Cn Cn + 4 M A=B S0 S1 G S2 S3 P F0 9 F1 10 F2 11 F3 13 VCC = PIN 24 GND = PIN 12
ACTIVE-LOW OPERANDS
2 1 23 22 21 20 19 18 A0 B0 A1 B1 A2 B2 A3 B3 Cn Cn + 4 M A=B S0 S1 G S2 S3 P F0 9 F1 10 F2 11 F3 13
7 8 6 5 4 3
16 14 17 15
7 8 6 5 4 3
16 14 17 15
LOGIC DIAGRAM
Cn M A0
B0
A1
B1
A2
B2
A3
B3
S0 S1
S2
S3
F0
F1
A=B
F2
F3
P
Cn + 4
G
FAST AND LS TTL DATA 4-93
MC54/74F181
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits Symbol VIH VIL VIK IOH VOH VOL IIH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output Current -- HIGH 54, 74 Output HIGH Voltage 74 Output LOW Voltage Input HIGH Current 100 M Input A and B Inputs IIL Input LOW Current S0 - 3 Inputs Cn Input IOS ICC Output Short Circuit Current (Note 2) Power Supply Current - 60 43 - 2.4 - 3.0 -150 65 mA mA mA mA VOUT = 0 V VCC = MAX VCC = MAX - 0.6 -1.8 2.7 3.4 0.35 0.5 20 V V A A mA mA VIN = 0.5 V VCC = MAX 2.5 3.4 Min 2.0 0.8 -1.2 250 Typ Max Unit V V V A V Test Conditions Guaranteed Input HIGH Voltage Guaranteed Input LOW Voltage IIN = -18 mA VOH = 5.5 V IOH = -1.0 mA IOH = -1.0 mA IOL = 20 mA VIN = 2.7 V VIN = 7.0 V VCC = MIN VCC = MIN, A = B VCC = 4.5 V VCC = 4.75 V VCC = MIN VCC = MAX
NOTES: 1. For conditions such as MIN or MAX, use the appropriate value specified under guaranteed operating ranges. 2. Not more than one output should be shorted at a time, nor for more than 1 second.
FUNCTIONAL DESCRIPTION The F181 is a 4-bit high-speed parallel Arithmetic Logic Unit (ALU). Controlled by the four Function Select inputs (S0 - S3) and the Mode Control input (M), it can perform all the 16 possible logic operations or 16 different arithmetic operations on active-HIGH or active-LOW operands. The Function Table lists these operations. When the Mode Control input (M) is HIGH, all internal carries are inhibited and the device performs logic operations on the individual bits as listed. When the Mode Control input is LOW, the carries are enabled and the device performs arithmetic operations on the two 4-bit words. The device incorporates full internal carry lookahead and provides for either ripple carry between devices using the Cn + 4 output, or for carry lookahead between packages using the signals P (Carry Propagate) and G (Carry Generate). In the Add mode, P indicates that F is 15 or more, while G indicates that F is 16 or more. In the Subtract mode, P indicates that F is zero or less, while G indicates that F is less than zero. P and G are not affected by carry in. When speed requirements are not stringent, it can be used in a simple Ripple Carry mode by connecting the Carry output (Cn + 4) signal to the Carry input (Cn) of the next unit. For high-speed operation the device is used in conjunction with a carry lookahead circuit. One carry lookahead package is required for each group of four F181 devices. Carry lookahead can be provided at various levels and offers high-speed capability over extremely long word lengths. The A = B output from the device goes HIGH when all four F outputs are HIGH and can be used to indicate logic equivalence over four bits when the unit is in the Subtract mode. The A = B output is open collector and can be wired-AND with other A = B outputs to give a comparison for more than four bits. The A = B signal can be used with the Cn + 4 signal to indicate A > B and A < B. The Function Table lists the arithmetic operations that are performed without a carry in. An incoming carry adds a one to each operation. Thus, select code LHHL generates A minus B minus 1 (2s complement notation) without a carry in and generates A minus B when a carry is applied. Because subtraction is actually performed by complementary addition (1s complement), a carry out means borrow; thus a carry is generated when there is no underflow and no carry is generated when there is underflow. As indicated, this device can be used with either active-LOW inputs producing active-LOW outputs or with active-HIGH inputs producing active-HIGH outputs. For either case the table lists the operations that are performed to the operands labeled inside the logic symbol.
FAST AND LS TTL DATA 4-94
MC54/74F181
AC CHARACTERISTICS
54/74F TA = +25C VCC = +5.0 V CL = 50 pF Mode Min 3.0 3.0 Sum Dif Any Sum Dif Sum Dif Sum Dif Sum Dif Logic Dif 5.0 5.0 5.0 5.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 4.0 3.5 3.0 3.0 3.0 3.0 4.0 4.0 4.5 4.5 4.0 4.0 11 7.0 Max 8.5 8.0 13 12 14 13 8.5 8.5 7.5 7.5 8.5 9.5 7.0 7.5 7.5 8.5 9.0 10 11 11 10.5 10 12 12 9.0 10 27 12.5 54F TA = -55 to +125C VCC = 5.0 V 10% CL = 50 pF Min 3.0 3.0 5.0 5.0 5.0 5.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 4.0 3.5 3.0 3.0 3.0 3.0 4.0 4.0 4.5 4.5 4.0 4.0 11 7.0 Max 10.5 10 15 14 16 15 10.5 10.5 9.5 9.5 10.5 11.5 9.0 9.5 9.5 10.5 11 11 13 13 12.5 12 14 14 11 12 31 14.5 74F TA = 0 to +70C VCC = 5.0 V 10% CL = 50 pF Min 3.0 3.0 5.0 5.0 5.0 5.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 4.0 3.5 3.0 3.0 3.0 3.0 4.0 4.0 4.5 4.5 4.0 4.0 11 7.0 Max 9.5 9.0 14 13 15 14 9.5 9.5 8.5 8.5 9.5 10.5 8.0 8.5 8.5 9.5 10 10 12 12 11.5 11 13 13 10 11 29 13.5 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Parameter Symbol tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Path Cn to Cn + 4 A or B to Cn + 4 A or B to Cn + 4 Cn to F A or B to G A or B to G A or B to P A or B to P Ai or Bi to Fi Ai or Bi to Fi Any A or B to Any F Any A or B to Any F A or B to F A or B to A = B
FAST AND LS TTL DATA 4-95
MC54/74F181
FUNCTION TABLE
Mode Select Inputs S3 L L L L L L L L H H H H H H H H S2 L L L L H H H H L L L L H H H H S1 L L H H L L H H L L H H L L H H S0 L H L H L H L H L H L H L H L H Active-LOW Operands & Fn Outputs Logic (M = H) A AB A+B Logic 1 A+B B AB A+B AB AB B A+B Logic 0 AB AB A Arithmetic** (M = L) (Cn = L) A minus 1 AB minus 1 AB minus 1 minus 1 A plus (A + B) AB plus (A + B) A minus B minus 1 A+B A plus (A + B) A plus B AB plus (A + B) A+B A plus A* AB plus A AB minus A A Active-HIGH Operands & Fn Outputs Logic (M = H) A A+B AB Logic 0 AB B AB AB A+B AB B AB Logic 1 A+B A+B A Arithmetic** (M = L) (Cn = H) A A+B A+B minus 1 A plus AB (A + B) plus AB A minus B minus 1 AB minus 1 A plus AB A plus B (A + B) plus AB AB minus 1 A plus A* (A + B) plus A (A + B) plus A A minus 1
*Each bit is shifted to the next more significant position. **Arithmetic operations expressed in 2s complement notation.
H = HIGH Voltage Level L = LOW Voltage Level
FAST AND LS TTL DATA 4-96

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